Efficient MVL Circuit Design with Use of p-CNTFETs and n-CNTFETs

Efficient MVL Circuit Design with Use of p-CNTFETs and n-CNTFETs

A novel, efficient CNTFET Galois design as a basic ternary-valued logic field - Document - Gale Academic OneFile

Low‐power consumption ternary full adder based on CNTFET - Jafarzadehpour - 2016 - IET Circuits, Devices & Systems - Wiley Online Library

A novel, efficient CNTFET Galois design as a basic ternary-valued logic field - Document - Gale Academic OneFile

Design and evaluation of energy-efficient carbon nanotube FET-based quaternary minimum and maximum circuits

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PDF] A Systematic Method to Design Efficient Ternary High Performance CNTFET-Based Logic Cells

Efficient MVL Circuit Design with Use of p-CNTFETs and n-CNTFETs

Full article: Novel design of power-efficient quaternary logic gates using CNTFET

Energy efficient design of unbalanced ternary logic gates and arithmetic circuits using CNTFET - ScienceDirect

Structure of CNTFET Carbon nanotube used as a channel in CNTFET between

Full article: A novel, efficient CNTFET Galois design as a basic ternary-valued logic field

A High-Performance and Energy-Efficient Ternary Multiplier Using CNTFETs